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| 1/18 AN1537 application note april 2002 introduction l5991's standby function is a valuable help in reducing light-load input consumption of offline converters and making them compliant with energy saving standards such as energystar, energy2000 and others. this func- tion, optimized for flyback topology, is the ability of automatically - and abruptly - reducing the oscillator frequen- cy (i.e. converter's switching frequency) as the converter's load falls below a defined threshold and restoring the normal oscillator frequency as the load increases and exceeds a second threshold. the frequency shift allows minimizing power losses related to switching frequency, which represent most of losses at light or no load, without giving up the advantages of a higher switching frequency at full load. being the l5991 a current-mode controller [1], the output voltage (v comp ) of its error amplifier (pin 6, comp), except for an offset, is proportional to the peak primary current and then to the energy handled by the transform- er cycle by cycle. it is then possible to deduce converter's load conditions by monitoring v comp . figure 1. l5991's standby function operation: f sw vs. v comp locus (left) and v comp vs. p in locus (right). if the peak primary current decreases as a result of a decrease of the power demanded by the load and v comp falls below a fixed threshold (v t1 ), the oscillator frequency will be set at a lower value (f sb ). if now the peak primary current increases and v comp exceeds a second threshold (v t2 >v t1 ) the oscillator frequency will be reset at the normal value (f osc ). since the frequency shift causes v comp to shift too but in the opposite direction for energy balance reasons, an appropriate hysteresis (v t2 -v t1 ) is provided to prevent the oscillator frequency from switching back and forth between f sb and f osc . this operation is shown in fig. 1. the l5991 allows programming both the normal and the standby frequency. v t1 and v t2 are internally fixed but 1234 pin f osc f sb v t 1 v t 2 normal operation standby v comp f osc f sb v t 1 p no p sb v t 2 normal operation standby v comp undershoot during transition overshoot during transition 1234 fsw by c. adragna and g. gattavari a simple trick enhances l5991's standby function this application notes describes a simple technique that allows improving the standby function of the advanced pwm controller l5991. the price to pay for that is the addition of just two resistors and two diodes, but the benefit brought in terms of no-load consumption in mains-operated converters is worth this small fee. the effectiveness of the improved standby function will be proved and assessed on a couple of existing designs.
AN1537 application note 2/18 it is possible to adjust the thresholds in terms of input power level (p no ,p sb ) by adding a dc offset on its current sense input (pin 13, isen). reference [2] provides plenty of details on this function and its usage. there is a maximum abrupt frequency shift allowed, which is related to the amount of hysteresis: the theoretical maximum ratio of f osc to f sb is 5.59, however this value does not account for the dynamic changes of v comp during the transients resulting from the frequency shift. as a matter of fact, depending on the closed-loop char- acteristics of the voltage control loop and on the amplitude of the load change that causes the frequency shift, v comp may overshoot or undershoot before reaching its new steady-state value (see figure 1). if during a tran- sient the other threshold is crossed, v comp may bounce from one threshold to the other and the switching fre- quency be unstable, going back and forth from one value to the other. as a result, the practical limit is less than the theoretical value, probably less than 4 and, at any rate, the control loop dynamics needs to be kept relatively slow to limit the aptitude of v comp to under- or overshooting. in [2] it is explained also that the addition of a dc offset on the current sense pin increases the maximum f osc to f sb ratio allowed. however, this technique is suitable for allowing a higher f osc with a given f sb . the lower limit on f sb is determined by other considerations: if it is in the audible range (< 16khz), the transformer will very likely generate audible noise, especially at power levels where the frequency is about to shift back to f osc , because of the high peak current involved. often, instead, for a given f osc an f sb as low as possible would be required to meet the latest design targets aimed at complying even with the most severe energy saving standards. in this case it would be desirable to have a very low frequency under no-load conditions, where the peak current is too small to be able to generate audible noise, and a frequency above the audible range at power levels where audible noise issues may arise. this is exactly the purpose of the modification to the oscillator proposed in the following section. standby function improvement to realize the aforementioned function, the oscillator frequency needs to be dependent on converter's load con- ditions - the lower the load, the lower the frequency and vice versa - and only when this is useful, that is at light load. this can be done by adding few parts to the oscillator of the l5991, as shown in figure 2. assuming a perfect matching of the two diodes (with a common-cathode dual diode like the bav70 this is closer to reality), when v comp falls below 3v (oscillator's peak voltage) some of the current that charges c t is diverted to ground through r c , d1 an r'. in this way the rate of rise of the voltage across c t is slowed down and the oscillator frequency decreased, the lower v comp the lower the frequency. instead, when v comp is greater than 3v d1 isolates r c and the oscillator frequency will be either f osc or f sb , like in the standard l5991 oscillator cir- cuit. r a ,r b and c t can be then calculated as usual with the formulae given in [1]; as to the determination of r c and r' please refer to the appendix. figure 2. oscillator modification to improve standby function d2 compensates for the temperature shift of the forward voltage drop v f of d1. considering that the current flowing through the diodes is in the hundred m a or less, d1 and d2 dissipate negligible power and only ambient temperature affects their v f . assuming d1 and d2 match perfectly, neither oscillator frequency nor the point where r c comes into play will depend on ambient temperature. in real-world operation, considering also that d1 and d2 do not usually carry the same current, a minimum temperature effect can be observed. r b l5991 c t r a vref 4 2 r c 16 s_by 6 comp rct additional parts d1 d2 r' d1, d2 2 x 1n41 48 or 1 x bav70 3/18 AN1537 application note the ofrequency foldbacko provided by the additional circuit starts in the neighborhood of v comp = 3v, that is a little before that the high-to-low frequency shift takes place. after the shift, v comp will be higher and then the switching frequency will be close or exactly equal to f sb , depending on the f osc to f sb ratio. in applications where the switching frequency needs not be tightly fixed for some specific reason there is no major drawback to this technique. the only point to take care of is that the oscillator frequency be in the audible range only when the peak current is so low that no sound may come from the transformer, even when it is made with normal construction techniques. this can be obtained simply by choosing f sb well above the audible range (e.g. f sb > 30khz seems to be a good rule of thumb). the benefits, on the contrary, are considerable: 1) very low switching frequencies are possible which, as already stated, will allow treating the power throughput as much efficiently as possible: mosfet's capacitive losses, gate drive consumption and other parasitic losses will be minimized. see [2] for more details on them. 2) since the additional components will be concerned with taking the oscillator frequency to very low values, the standby frequency f sb can be kept relatively high, thus reducing the abrupt frequency shift and eliminating the need for a slow feedback to prevent frequency instability. as already said, keep- ing f sb high has the positive side-effect of eliminating audible noise issues. 3) as a result of the faster dynamic response, start-up under no-load conditions is possible even with a minimum pre-load on the output. the dummy load represented by the feedback network, as well as bleeders, if used, can be minimized. the limit to the dummy load reduction is given by the collapse that the voltage delivered by the self-supply winding experiences with no load, which must not pull the supply voltage of the l5991 below the uvlo threshold. to evaluate how much this function modification improves converter's performance at light or no load, the 45w wide-range mains ac-dc adapter illustrated in [3] and the 80w power-factor-corrected ac-dc adapter de- scribed in [4] will be optimized following the guidelines revealed by the above considerations. the oeuropean code of conduct on efficiency of external power supplieso, ecc in short, whose limits are summarized in table 1, will be assumed as the reference. table 1. limits envisaged by european code of conduct on efficiency of external power supplies optimization of a 45w, wide-range mains ac-dc adapter for reader's convenience, table 2 summarizes the electrical spec of the adapter under consideration. please refer to [3] for a detailed description and full evaluation data. table 2. 45w, wide-range mains ac-dc adapter: electrical specification of the original design rated input power max. no-load power consumption phase 1 01.01.2001 phase 2 01.01.2003 phase 3 01.01.2005 0.3w and < 15w 1.0w 0.75w 0.30w 15w and < 50w 1.0w 0.75w 0.50w 50w and < 75w 1.0w 0.75w 0.75w input voltage range (v in )88to264vac mains frequency (f l ) 50/60hz maximum output power (p out ) 45w output vout = 18v 3% iout = 2.5a max. full load ripple 2% pk-pk normal operation switching frequency (f osc ) 70khz typ. light load switching frequency (f sb ) 18khz typ. full-load efficiency (@ pout =45w, vin = 88 264vac) > 80% maximum no-load input power (vin = 88 264vac) < 1w AN1537 application note 4/18 since the full-load input power is greater than 50w, this adapter belongs to the third bracket envisaged by the ecc. its no load consumption is 0.9w @264vac and 0.7w @220vac then it meets phase 1 limit (1w) and is close to that of phase 2 and 3 (0.75w) with almost no margin. although the ecc specifies that the compliance test be done at the nominal voltage 230 vac, in the pre-com- pliance test it is quite usual to refer to the consumption at 264 vac, to account for production spread. with this criterion the adapter cannot be considered compliant with phase 2 or 3 limits. the target of the optimization is then to make the adapter ecc-compliant in the above mentioned sense. figure 3 shows the electrical schematic of the converter with the added and modified components highlighted. only these changes will be discussed. figure 3. 45w ac-dc adapter: electrical schematic of the modified circuit 1) the oscillator has been modified to maintain the same frequency under normal operation (70khz) at full load and have a standby frequency equal to half the normal frequency (35khz). the oscillator fre- quency with no-load will be 5khz. further details on the calculations can be found in the appendix. 2) the dummy load represented by the feedback components on the secondary side (170mw in the original design) has been reduced at 40mw: r21 has been increased from 348 w to 3.16k w and, consequently, r18 from 2.2 to 20k w to maintain the same regulated output voltage. this reduces the current consumption of the divider from 7.2 to 0.8ma. additionally, r19 which was to provide 1ma extra bias current to the reference of the pc905, has been taken out since it was not strictly necessary. 3) the frequency compensation of the voltage control loop (c7, c14, r20) has been modified so as to get a larger bandwidth - it has been almost doubled - and then a faster response. the main purpose of that is to allow a correct start-up of the converter even with no load, whereas a slow feedback (ba- sically, a large c14) causes the system to try continuously to restart under these conditions. 4) r7 has been decreased from 4.7 to 1 w , to prevent the supply voltage of the l5991 from going below the uvlo threshold with no load. to help this, the total consumption of the ic has been reduced by 0.3 ma by increasing r8 and r9 (from 5.6 to 22k w and from 6.8 to 27k w , respectively). although with this change the voltage generated at full load is higher, it is still below the ovp threshold, set by r5 and r6, with a safe margin. these modifications are summarized in table 3. 88 to 264 vac bd1 d f04m c1 100 m f 400 v r1 56 k w 10 r11 10 w 13 r14 1k w 15 12 r15 0.47 w 1/2 w 8 14 6 r6 330 k w 43 2 r9 27 k w c5 3.3 nf r13 12 k w 7 q1 stp7nb60 c9 330 m f 25 v gnd ic1 l599 1 c12 4.7 n f 2kv d2 stta106 r 5 47 k w c2 47 m f 25 v r10 22 w 5 9 dcc r8 22 k w vref c4 100 nf c6 56 nf rct ss dc-lim sgnd r3 2.2 m w c8 100 pf 11 pgnd isen out vc vcc dis comp vfb t1 18v/2.5a 16 st-by 7 6 1 2 4 3 r19 n.a. r17 4.3 k w r21 3.16 k w c7 3.3 nf c3 100 nf c14 8.2 nf r16 100 w r18 20 k w r20 180 k w d4 1n4148 d5 byw29-200 r2 56 k w r4 2.2 m w c10 330 m f 25 v c11 330 m f 25 v ic2 pc905 n1 n2 n3 f1 t2a250v d3 1n4148 d1 bzw06-154 ntc1 n.a. r23 n.a. r22 n .a. c17 n.a. c13 n.a. c15 220 nf rc 5.9 k w r7 1 w d6 1n4148 r12 12 k w d7 1n4148 r' 8.2 k w 5/18 AN1537 application note table 3. 45w, wide-range mains ac-dc adapter: list of modifications to the original design 45w ac-dc adapter: evaluation results the following diagrams compare the performance of the original design (ostandard standbyo) with that of the modified one (oimproved standbyo). for reference, it has also been measured the input consumption after re- placing the start-up circuit made up of r1, r2 and d3 with an active start-up circuit (see fig. 12). to be noted in figure 4, the no-load consumption is < 0.6w @ 264vac, then the adapter under test meets the ecc limits, phase 3 (< 0.75w @230vac) with some margin even without the use of an active start-up circuit. figure 4. 45w ac-dc adapter: light load input consumption comparison the diagram on the left in figure 5 shows the relationship between output current and switching frequency ob- tained with the modified oscillator. the oscillator frequency is not much affected by the input voltage, as shown also by the oscilloscope diagrams of figures 6 to 10: the internal propagation delay of the current sense pin is compensated by r3 and r4, then the changes of v comp (and, consequently, f sw ) with the input voltage are neg- ligible. the diagram on the right in figure 5 illustrates the effect of temperature on both the oscillator frequency and the no-load input consumption (@264vac) in the temperature range 0-70 c: the variation is very limited. part original value new value part origin al value new value r7 4.7 w 1 w r20 5.6k w 180k w r8 5.6k w 22k w r21 348 w 3.16k w r19 6.8k w 27k w r c --- 5.9k w r12 24k w 12k w r' --- 8.2k w r13 8.2k w 12k w c7 220pf 3.3nf r18 2.2k w 20k w c14 470nf 4.7nf r19 1.2k w --- d6, d7 --- 1n4148 50 100 150 200 250 300 0.6 0.8 1 1.2 1.4 1.6 vin [vac] pin [w] pout = 0.5 w fsw = 16 khz tamb= 25 c standard standby improved standby improved standby with active start-up (*) 50 100 150 200 250 300 0.4 0.6 0.8 1 1.2 1.4 vin [vac] pin [w] pout = 0.3 w fsw = 13 khz tamb= 25 c standard standby improved standby improved standby with active start-up (*) 50 100 150 200 250 300 0 0.2 0.4 0.6 0.8 1 vin [vac] pin [w] pout = 0 w fsw = 5 khz tamb= 25 c standard standby improved standby improved standby with active start-up (*) (*) refer to the circuit shown in the schematic of figure 12 (*) refer to the circuit shown in the schematic of figure 12 (*) refer to the circuit shown in the schematic of figure 12 AN1537 application note 6/18 figure 5. 45w ac-dc adapter: f sw vs. i out (left); p in (@ p out = 0) and f sw vs. ambient temperature (right) figure 6. 45w ac-dc adapter: waveforms @ p out =45w figure 7. 45w ac-dc adapter: waveforms @ p out = 7w, just after the abrupt frequency shift 0.001 0.01 0.1 1 3 5 10 20 30 50 100 iout [a] fsw [khz] tamb = 25 c vin = 110 vac, 230 vac -20 0 20 40 60 80 3 4 5 6 7 0.54 0.55 0.56 0.57 0.58 tamb[ c] fsw [khz] pin [w] fsw pin pout = 0 w vin = 264 vac rct (pin 2 of l5991) q1 drain vin = 220 vac, pout = 45w rct (pin 2 of l5991) q1 drain vin = 110 vac, pout = 45w q1 drain vin = 220 vac, pout = 7w q1 drain vin = 110 vac, pout = 7w rct (pin 2 of l5991) rct (pin 2 of l5991) 7/18 AN1537 application note figure 8. 45w ac-dc adapter: waveforms @ p out = 0.5w figure 9. 45w ac-dc adapter: waveforms @ p out = 0.3w figure 10. 45w ac-dc adapter: waveforms @ p out =0w q1 drain vin = 110 vac, pout = 0.5w q1 drain vin = 220 vac, pout = 0.5w rct (pin 2 of l5991) rct (pin 2 of l5991) q1 drain vin = 110 vac, pout = 0.3w q1 drain vin = 220 vac, pout = 0.3w rct (pin 2 of l5991) rct (pin 2 of l5991) q1 drain vin = 110 vac, pout = 0w q1 drain vin = 220 vac, pout = 0w rct (pin 2 of l5991) rct (pin 2 of l5991) AN1537 application note 8/18 figure 11. 45w ac-dc adapter: load transient 0.1 ? 2.5a @ 220vac optimization of a 80w ac-dc adapter with pfc table 4 summarizes the items of the electrical spec of this adapter more relevant to this context. please refer to [4] for full electrical spec and evaluation data, as well as for a detailed description. table 4. 80w ac-dc adapter with pfc: electrical specification of the original design the full-load input power is greater than 100w, then this adapter is actually out of the scope of the ecc. its no load consumption (0.9w @265vac, 0.7w @220 vac), however, is within the phase 1 limit (1w) and not far from that of phase 2 and 3 (0.75w @230 vac) for the highest power bracket. again, the target of the optimization is to meet phase 3 limit @vin = 264 vac. figure 12 shows the electrical schematic with the added and modified components highlighted. only these changes, which track those made in the previously considered design plus those related to the pfc stage, will be discussed input voltage range (v in ) 90 to 265vac mains frequency (f l ) 50/60hz maximum output power (p outmax ) 80w output v out = 18vdc 2% i out = 0 to 4.5a v ripple 1% line and load regulation < 1% switching frequency (flyback, @ p out = 80w) 65khz switching frequency (flyback, @ p out = 0w) 20khz target overall efficiency (@ p out = 80w, v in =90 265vac) h >75% maximum no-load input power (v in =90 265vac) < 1w iout vout comp (pin 6 of l5991) 9/18 AN1537 application note figure 12. 80w ac-dc adapter with pfc: electrical schematic of the modified circuit lf1-a t1a l1 2.2 m +18v / 4.5a gnd_out f1 t4a ntc1 10 lf2-a lf1-b lf2-b c2 0.47 m f c25 3.3n c16 n.a. c3 0.68 m f 630v c9 100nf c10 3.3nf c13 3.3nf c11 10nf c15 220pf c4 4.7nf c7 10nf t1b t2c t2a c23 n.a. t2b d11 byw51-200 c5 4.7nf tr4 bc547 zr1 si0300 q1 stp9nb50 c1 0.22 m f 630v r3a, b 1.5m + 1.5m r7a,b 1.5m + 1.5m + d1 stta106 d10 1n4148 d9 bav19 r6a 22k r5a,b zr2 r33 33k r29 3.16k r39 10m q2 stp7nb80 r31 20k r30 n.a. r32 4.3k r2 68k r4 33 c8 1 m f r1 22k r22a, b 10k + 10k r13 6.8k r9 150k r14 6.8k r8 150k r11 27k tr3 bc557 r37 27k r10 100k r36 5.6k r12 47k tr1 bc547 tr2 bc547 tr5 bc557 q3 std1nb50 r19 100k c12 100nf d6 z18 r21a, b 10m + 10m c29 10 m f 25v c17 47 m f 25v c19 680 m f 25v c14 4.7 m f c18 100 m f 25v c28 100 m f 450v r38 47 r23 22 r24 1k r27 n.a. r25a,b 0.56 // 0.56 r20 100k r17 47k r15 15k r16 11k d8 1n4148 r18 330k r28 1 3 x 1.5ke68 d12 a,b,c d7 mur1100 r26 22 dc-lim v c out v cc dis dcc st-by vref rct ss sgnd vfb comp 3 7 4 52 1 8 d2 d4 d3 d5 6 ic1 l6561 ic2 l5991a isen pgnd oc1 pc817a 4 3 1 2 c20 680 m f 25v c21 680 m f 25v c22 680 m f 25v c24 680 m f 25v c6 100nf c27 c26 4.7nf 0.56 // 0.56 r c 7.5k d13 1n4148 14 8 9 10 13 15 11 6 5 12 7 2 4 16 3 90 vac to 264vac r7c 499k c30 33 nf 400v d14 1n4148 vr1 tl431c AN1537 application note 10/18 1 the oscillator of the l5991 has been modified to maintain the same frequency under normal opera- tion (65khz) at full load and have a standby frequency of 36khz. also in this case the oscillator fre- quency with no-load is chosen 5khz. further details on the calculations can be found in the appendix. 2 again, the dummy load represented by the feedback components on the secondary side has been reduced at about 40mw (see the same point of the previous design). 3 the frequency compensation of the voltage control loop (c7, c14, r20) has been modified so as to double the bandwidth and get a faster response (especially useful at start-up). 4 r28 has been decreased from 3.3 to 1 w , to prevent the supply voltage of the l5991a from going below the uvlo threshold with no load, while not exceeding the rating of both the l5991a and the l6561. 5 the multiplier bias resistors (r3a = r3b = 680k w and r1 = 10 k w ) of the l6561 consume 103mw @264 vac, then their value has been more than doubled (r3a = r3b = 1.5m w and r1 = 22k w ). in this way their maximum consumption is reduced at 46mw @264 vac. 6 the output divider of the pfc pre-regulator (r7a = r7b = 499k w and r1 = 6.34k w ) gives origin to a consumption of 140mw @264 vac. with the aim of reducing the consumption at 40mw maximum, while not degrading the dynamic ovp function, the feedback network has been modified as shown in figure 13. the capacitor bypasses the two 1.5m w resistors during output voltage overshoots, re- sulting in a only slightly higher ovp threshold, as compared to the original one. the positive side- effect is an improvement of the transient response of the pfc pre-regulator. the components for the frequency compensation of the error amplifier of the l6561 have been changed consequently. the modifications are summarized in table 5. figure 13. modified pfc pre-regulator's feedback and frequency compensation network table 5. 80w ac-dc adapter with pfc: list of modifications to the original design part original value new value part origin al value new value r1 10k w 22k w r31 2.2k w 20k w r3a, r3b 680k w 1.5m w r33 13k w 33k w r6a 6.34k w 22k w r34 510k w --- r7a, r7b 499k w 1.5m w r35 2.2k w shorted r7c --- 499k w r36 10k w 5.6k w r15 10k w 15k w r c --- 7.5k w r16 22k w 11k w c13 15nf 3.3nf r28 3.3 w 1 w c25 330nf 3.3nf r29 348 w 3.16k w c30 --- 33nf / 400v r30 1.2k w --- d13, d14 --- 1n4148 r7a 1.5m r6a 22k 2 l6561 pfc out c8 1 m f r7c 499k c30 33 nf 400v r7b 1.5m 11/18 AN1537 application note 80w ac-dc adapter with pfc: evaluation results the following diagrams compare the performance of the original design (ostandard standbyo) with that of the modified one (oimproved standbyo). to be noted in figure 14, the no-load consumption is slightly less than 0.5w @ 264vac, then the modified 80w adapter now meets the ecc limits, phase 3 for the 15-50w bracket (< 0.5w @230vac). figure 14. 80w ac-dc adapter with pfc: light load input consumption comparison figure 15. 80w ac-dc adapter with pfc: f sw vs. i out (left); f sw vs. v in (right) 50 100 150 200 250 300 0,8 0,9 1 1,1 1,2 1,3 1,4 1,5 vin [vac] pin [w] pout = 0.5 w tamb= 25 c standard standby improved standby 50 100 150 200 250 300 0,4 0,6 0,8 1 1,2 1,4 vin [vac] pin [w] pout = 0.3 w tamb= 25 c standard standby improved standby 50 100 150 200 250 300 0,2 0,4 0,6 0,8 1 vin [vac] pin [w] pout = 0 w tamb= 25 c standard standby improved standby 50 100 150 200 250 300 2 4 6 8 10 12 14 16 18 vin [vac] fsw [khz] ta mb= 25 c pout = 0.5w pout = 0.3w pout = 0w 0.001 0.01 0.1 1 3 5 10 20 30 50 100 iout [a] fsw [khz] tamb = 25 c vin = 230 vac vin = 110 vac 5 AN1537 application note 12/18 figure 16. 80w ac-dc adapter with pfc: p in (@ p out =0) and f sw vs. ambient temperature the diagrams in figure 15 illustrate the relationship between output current, input voltage and switching fre- quency obtained with the modified oscillator. unlike the previously considered design, in this case the internal propagation delay of the current sense pin is not compensated, then v comp changes slightly with the input volt- age and then there is a variation of the oscillator frequency. the diagrams of figure 16 illustrate the very limited temperature effect on both the oscillator frequency and the no-load input consumption at both nominal voltages in the temperature range 0-70 c. figure 17. 80w ac-dc adapter with pfc, flyback section: waveforms @ p out =80w figure 18. 80w ac-dc adapter with pfc, flyback section: waveforms @ p out =30w -20 0 20 40 60 80 2 4 6 8 10 12 0.24 0.26 0.28 0.3 0.32 0.34 tamb[ c] fsw [khz] pin [w] fsw pin pout = 0 w vin = 110 vac -20 0 20 40 60 80 2 4 6 8 10 12 0.36 0.38 0.4 0.42 0.44 0.46 tamb[ c] fsw [khz] pin [w] fsw pin pout = 0 w vin = 230 vac q2 drain rct (pin 2 of l5991) vin = 110 vac, pout = 30w vin = 230 vac, pout = 30w q1 drain q1 drain rct (pin 2 of l5991) rct (pin 2 of l5991) 13/18 AN1537 application note figure 19. 80w ac-dc adapter with pfc, flyback section: waveforms @ p out = 0.5w figure 20. 80w ac-dc adapter with pfc, flyback section: waveforms @ p out = 0.3w figure 21. 80w ac-dc adapter with pfc, flyback section: waveforms @ p out =0w vin = 110 vac, pout = 0.5w vin = 230 vac, pout = 0.5w q2 drain q2 drain rct (pin 2 of l5991) rct (pin 2 of l5991) vin = 110 vac, pout = 0.3w vin = 230 vac, pout = 0.3w q2 drain q2 drain rct (pin 2 of l5991) rct (pin 2 of l5991) vin = 110 vac, pout = 0w vin = 230 vac, pout = 0w q2 drain q2 drain rct (pin 2 of l5991) rct (pin 2 of l5991) AN1537 application note 14/18 figure 22. 80w ac-dc adapter with pfc, flyback section: load transient 0.1 ? 4.5a @ 220vac conclusions a simple modification of the oscillator allows optimizing l5991-based converters to achieve a considerable de- crease of the no-load consumption. this has been proved in a 45w ac-dc adapter and in an 80w power-factor- corrected adapter, where the optimization here proposed has brought a reduction of the no-load input consump- tion up to 400mw at high line. this is the result of concurrent improvements. the modification to the oscillator allows very low switching fre- quency under no-load conditions without a large f osc to f sb ratio. the resulting lower v comp jump provides more headroom for overshoots and undershoots, so that it has been possible to enlarge the bandwidth of the control loop without any frequency instability. in turn, the faster response due to the larger bandwidth has allowed the reduction of the dummy load on the output, without compromising correct start-up when the adapter is unloaded. the lower residual load and the loss reduction due to the very low oscillator frequency, results in a dramatic decrease of the power absorbed from the mains at no load. references [1] ol5991/l5991a primary controller with standbyo datasheet [2] ominimize power losses of lightly loaded flyback converters with the l5991 pwm controllero (an1049) [3] o45w ac-dc adapter with standby functiono (an1134) [4] o80w power-factor-corrected ac-dc adapter with standby using the l6561 and the l5991ao (an1440) iout vout comp (pin 6 of l5991) 15/18 AN1537 application note appendix how to calculate r c and r'. as previously said in the section ostandby function improvemento , there is no change for the calculation of the timing components c t ,r a ,r b because r c is disconnected by the series diode d1 when v comp > 3v. then only the calculation of r c to get a given f min , as well as that of r' needs to be taken into consideration. to this end it is necessary to consider first the timing equations that govern the operation of the oscillator. refer to figure a1 for the equivalent circuit and the relevant waveform, which assume that d1 and d2 match. figure a1. equivalent circuit for oscillator calculations (left) and theoretical v(rct) waveform (right) as long as the oscillator voltage v(rct) is less then v comp , d1 is reverse-biased (sw is open) and only r a contributes to the time constant t ; moreover, the asymptote of the exponential curve is the reference voltage v ref (5v). when v(rct) equals and exceeds v comp , d1 is forward-biased (sw is closed), then r c goes in parallel to r a to determine the time constant t ' and the asymptote will be changed to: note that the new time constant t ' is shorter, then it will be the lower asymptote the responsible for getting a longer oscillator period. the complete equation describing the oscillator is then (a1) where: is the time when v(rct) = v comp and r c comes into play (i.e. sw is closed), v v is the oscillator valley voltage (1v) and the time constants t and t ' are defined as shown in figure a1. to find a simple formula to calculate r c some simplifications are necessary. usually t 1 << t sw =1/f min , then t 1 will be neglected and it is possible to write: , (a2) where v pk is the oscillator peak voltage (3v) and v comp 0 the value of v comp under no-load conditions. but, if t 1 << t sw it will be also t '< AN1537 application note 16/18 that, solved for r c , yields: . (a3) the maximum value for r' can be calculated by imposing that d2 be always forward-biased, that is its current never fall to zero, with v comp =v comp 0 . the current flowing through d2 is: , while the maximum current flowing through d1 is: . then, imposing i d2 > 0 with i d1 =i d1x and solving for r', it is possible to obtain: . (a4) since i d1 and i d2 are typically in the hundred m a, with good approximation it is possible to assume v f = 0.5v @25 c in (a4). worst-case scenario is at minimum operating temperature: -2.5 mv/ c drift can be considered to take this into account. the point is now to calculate the value of v comp 0 . in [2] it is shown that in l5991-based flyback converters the following relationships holds true: , (a5) where rs is the sense resistor (r15 in figure 3, r25 in figure 12), p in the input power to the transformer, l p its primary inductance, v in the dc input voltage to the converter, t delay the internal propagation delay of the current sense pin (200 ns typ.) and v o a dc voltage offset that can be applied to the current sense pin. in case the offset v o is chosen equal to , the effect of the propagation delay is compensated and v comp will no longer depend on the input voltage v in . that is the case of the 45w adapter, where the job is done by r3 and r4 along with r14. for the 80w adapter there is no compensation (v o = 0) then there will be a slight dependence of v comp (and then of the oscillator frequency when r c is active) on v in . this is confirmed by the experimental results. figure a2. v comp voltage under no-load conditions: 45w adapter (left), 80w adapter (right) v pk v ref r c r a r c + ---------------------- v comp 0 r a r a r c + ---------------------- + = r c r a = v pk v comp 0 v ref v pk ------------------------------------- - r a 3v comp 0 2 ------------------------------ - = i d2 v comp 0 v f r ' ---------------------------------- - i d1 = i d1x v pk v f v comp 0 v f () r c -------------------------------------------------------------------- - v pk v comp 0 r c ------------------------------------- - 3v comp 0 r c ------------------------------- === r ' r c v comp 0 v f v pk v comp 0 ------------------------------------- - < r c v comp 0 v f 3v comp 0 ---------------------------------- - = v comp 1.4 3 r s 2p in f sw l p -------------- v in l p ------- - t delay ?? ?? ?? v o + + = rs v in l p ------- - t delay 45w adapter 80w adapter 17/18 AN1537 application note to calculate v comp 0 ,p in needs to be estimated considering the power processed by the transformer under no- load conditions. it is possible to use the following formula: p in = 1.25(v out i outres +v aux i aux ) , (a6) where i outres is the residual output current (through the output divider, through the optocoupler's led, as well as any residual dummy load resistor), v aux is the voltage generated by the auxiliary winding that supplies the l5991 (and the l6561 in the 80w adapter) and i aux the total consumption on this winding (quiescent current of the l5991, of the l6561 too in the 80w adapter, optocoupler's transistor current and the consumption of any circuit supplied by the reference voltage of the l5991 or directly connected to its supply bus). the coefficient 1.25 stems from an estimated efficiency of 80% that experiments have shown many flyback transformers fea- ture under no-load conditions, almost regardless of their size, parameters and construction. it is obvious that the estimate of p in is the weak point of this design procedure. since it is essentially the asymp- tote of the oscillator waveform that governs the oscillator frequency, even some ten mv variation of v comp 0 may change the frequency considerably. a small error in the assessment of v comp 0 , then, could lead to a value for r c that gives an f min away from the target. this is why it is recommended to use the result of the calculation as a starting point that has to be checked on the bench and, in case, corrected after the experiments. for com- pleteness, it must be said also that under no-load conditions v comp is far from being a perfect dc voltage, as shown in the diagrams of figure a2. 45w adapter example calculation with c t = 3.3nf, r a and r b are 12k w each. the residual output load is 40mw, the total consumption of the auxiliary winding is estimated around i aux = 10ma, that is 110mw assuming v aux = 11v. then, using (a6): p in 1.25 (0.04 + 0.11) = 0.188w . v comp 0 will be given by (a5), where it is assumed a perfect propagation delay compensation: . from (a3): use standard value 5.9k w . from (a4), considering t amb =0 c, then v f = 0.563v: use standard value 8.2k w . 80w adapter example calculation with c t = 3.3nf, we get r a =15k w and r b =11k w . the residual output load is 40mw, the total estimated con- sumption of the auxiliary winding is i aux = 12ma, that is 120mw assuming v aux = 10v. then, using (a6): p in 1.25 (0.04 + 012) = 0.2w v comp 0 will be given by (a5): . from (a3): use standard value 7.5k w from (a4) ), considering t amb =0 c, then v f = 0.563 v: use standard value 5.6k w . v comp 0 1.4 3 0.47 2 0.188 ? 510 3 400 10 6 ??? ------------------------------------------------ ? + 2.011v == r c 12 10 3 3 2.011 2 ----------------------- - ? 5.934 10 3 ? == r ' 5.9 10 3 2.011 0.563 3 2.011 ----------------------------------- - ? < 8.638 10 3 ? = v comp 0 1.4 3 0.28 20.2 ? 510 3 430 10 6 ??? ------------------------------------------------ 375 200 10 9 ?? 430 10 6 ? ---------------------------------------- - ?? ?? ?? ? + 1.616v == r c 11 10 3 3 1.616 2 ----------------------- - ? 7.612 10 3 ? == r ' 7.5 10 3 1.616 0.563 3 1.616 ----------------------------------- - ?? < 5.706 10 3 ? = information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan -malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http:/ /www.st.com 18/18 AN1537 application note |
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